The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an active barrier structure.
In products used for automobiles, motor drive, audio amplifiers, and the like, an L (self inductance) load in wiring etc. sometimes produces counter-electromotive force to cause the drain (n-type region) of an output transistor to have a negative potential. In this case, the negative potential allows electrons to be injected from the drain to a p-type substrate and move from an output transistor formation region to an other element formation region through the p-type substrate, causing the other elements to malfunction.
In order to prevent the electrons injected into the p-type substrate from affecting the peripheral elements, for example, a semiconductor device disclosed in Japanese Patent Laid-open No. 2009-177087 (Patent Document 1) can be considered. In the semiconductor device disclosed in Japanese Patent Laid-open No. 2009-177087, a high-concentration impurity diffusion region is so provided as to surround a CMOS (Complementary Metal Oxide Semiconductor) circuit to be protected. Furthermore, a ground voltage is applied to the high-concentration impurity diffusion region.